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Speed up your FPGA Design

Fixstars' OpenCL FPGA solution

OpenCL FPGA Cards

OpenCL improves system performance and design productivity

Bittware's "OpenCL FPGA Cards" is an accelerator board that can be designed with OpenCL (Open Compute Language).

By using Altera SDK for OpenCL, it is easy for software developers dealing with C language to develop systems using FPGAs.

By using the FPGA as an accelerator of the CPU, it is possible to improve the throughput of the system with lower power consumption than using other hardware, and it can be used not only in the telecommunications and networking industry and but also in the consumer, automotive and industrial market.

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FPGA design by OpenCL

OpenCL is an open standard for writing programs to run between heterogeneous platforms including CPU, GPU, and FPGA. As a technology to realize efficient and highly compatible software, OpenCL is participating in standardization by major semiconductor manufacturers, hardware vendors and software vendors all over the world. Fixstars is also a Contribution member of the OpenCL standard group Khronos group. To learn more about OpenCL please visit

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Shorten Time to Market

  • The time to market is greatly shortened compared with the conventional FPGA design flow
  • Describing algorithms using C language-based OpenCL C instead of the conventional low-level hardware description language (HDL)
  • Construct design quickly while keeping design abstraction level high
  • Prevent design obsolescence as it can change OpenCL C code targets to current and future FPGAs
  • Generate FPGA implementation of OpenCL C code in a single step. No need for manual timing convergence work or implementation of a communication interface between FPGA - host - external memory

High performance and power efficient solution

  • Improved performance by offloading functions requiring high performance from the host processor in the FPGA
  • Achieve high performance with significantly lower power consumption than other hardware options
  • Construct design quickly while keeping design abstraction level high
  • Altera's SDK for OpenCL realizes low power consumption of about 1/5 of other hardware options by generating the necessary logic by taking advantage of the fine architecture of FPGA

Fixstars has a strong track record with heterogeneous platforms ("heterogeneous computing") and has been developing software for Cell Broadband Engine ™ and GPU. For OpenCL, which was created for heterogeneous computing, Fixstars has been providing compiler products and application development services from early on, as well as programming seminars and writing books for software developers.

Books of Fixstars

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Lineup

We deal with OpenCL compliant FPGA card released by BittWare. For detailed specifications of each product please visit the manufacturer website open_in_new .

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520N-MX | Stratix 10

  • checkIntel Stratix 10 MX2100
  • check16GB HBM2 up to 512 GB/s
  • checkBittWare-optimized OpenCL BSP
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520N | Stratix 10

  • checkIntel Stratix 10 GX 2800
  • check4x QSFP28s for 400Gbps
  • checkBittWare-optimized OpenCL BSP
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520C | Stratix 10

  • checkIntel Stratix 10 GX 2800
  • checkUp to 32GBytes DDR4
  • checkBittWare-optimized OpenCL BSP
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510T | Dual Arria 10

  • checkDual Intel Arria 10 GX 1150
  • checkUp to 32 GBytes DDR4
  • checkOpenCL BSP
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385A | Arria 10

  • checkIntel Arria 10 GX 1150
  • check2x QSFP+ for 10/40Gbps
  • checkOpenCL BSP
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A10SA4 | Arria 10

  • checkAltera Arria 10 GX 1150 FPGA
  • checkPCIe x8 Gen3
  • checkOptional QSFP for 40GbE or 4x 10GbE
  • checkUp to 16 GBytes of DDR4 SDRAM with ECC (x72)
  • checkBoard Management Controller for Intelligent Platform Management
  • checkComplete software support and FPGA examples
  • checkAggressive volume pricing
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A10PL4 | Arria 10

  • checkAltera Arria 10 GX FPGA
  • checkPCIe x8 interface supporting Gen1, Gen2, or Gen3
  • checkDual QSFP cages for 2x 40GbE or 8x 10GbE
  • checkMemory: up to 32 GBytes of DDR4 SDRAM with ECC (x72)
  • checkBoard Management Controller for Intelligent Platform Management
  • checkPrecision clock and timing options
  • checkUtility I/O: USB 2.0

Development environment

Intel FPGA SDK for OpenCL

To develop using OpenCL on Intel FPGA Accelerator board, you need "Intel FPGA SDK for OpenCL".

The Intel FPGA SDK for OpenCL converts OpenCL kernel functions to custom FPGA hardware accelerators, adds interface IPs, builds intermediate logic, and generates FPGA programming files. In addition, this SDK includes libraries that link to the OpenCL API which is called in the host program on the CPU. By automating such steps, designers will be able to focus on defining and executing algorithms over hardware design.

Bitware Board Support Package (BSP)

Bitware offers board support packages for Intel Arria 10, Stratix 10 FPGA boards to develop FPGA accelerator boards using OpenCL. We provide BSPs for high performance computers (HPC) that connect to the CPU via PCIe, MAC BSPs for networks that connect via 10GbE, and custom BSPs that match the application.

The Intel FPGA SDK for OpenCL converts OpenCL kernel functions to custom FPGA hardware accelerators, adds interface IP, builds intermediate logic, and generates FPGA programming files. The SDK also includes a library that links to the OpenCL API that is called in the host program on the CPU. This automation of steps allows designers to focus on defining and executing algorithms rather than hardware design.

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