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Speed up your FPGA Design

Fixstars' OpenCL FPGA solution

OpenCL FPGA Cards

OpenCL improves system performance and design productivity

Nallatech's "OpenCL FPGA Cards" is an accelerator board that can be designed with OpenCL (Open Compute Language).

By using Altera SDK for OpenCL, it is easy for software developers dealing with C language to develop systems using FPGAs.

By using the FPGA as an accelerator of the CPU, it is possible to improve the throughput of the system with lower power consumption than using other hardware, and it can be used not only in the telecommunications and networking industry and but also in the consumer, automotive and industrial market.

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FPGA design by OpenCL

OpenCL is an open standard for writing programs to run between heterogeneous platforms including CPU, GPU, and FPGA. As a technology to realize efficient and highly compatible software, OpenCL is participating in standardization by major semiconductor manufacturers, hardware vendors and software vendors all over the world. Fixstars is also a Contribution member of the OpenCL standard group Khronos group. To learn more about OpenCL please visit

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Shorten Time to Market

  • The time to market is greatly shortened compared with the conventional FPGA design flow
  • Describing algorithms using C language-based OpenCL C instead of the conventional low-level hardware description language (HDL)
  • Construct design quickly while keeping design abstraction level high
  • Prevent design obsolescence as it can change OpenCL C code targets to current and future FPGAs
  • Generate FPGA implementation of OpenCL C code in a single step. No need for manual timing convergence work or implementation of a communication interface between FPGA - host - external memory

High performance and power efficient solution

  • Improved performance by offloading functions requiring high performance from the host processor in the FPGA
  • Achieve high performance with significantly lower power consumption than other hardware options
  • Construct design quickly while keeping design abstraction level high
  • Altera's SDK for OpenCL realizes low power consumption of about 1/5 of other hardware options by generating the necessary logic by taking advantage of the fine architecture of FPGA

Fixstars has a strong track record with heterogeneous platforms ("heterogeneous computing") and has been developing software for Cell Broadband Engine ™ and GPU. For OpenCL, which was created for heterogeneous computing, Fixstars has been providing compiler products and application development services from early on, as well as programming seminars and writing books for software developers.

Books of Fixstars

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Lineup

We deal with OpenCL compliant FPGA card released by Nallatech. For detailed specifications of each product please visit the manufacturer website open_in_new .

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520N - with Intel Stratix 10

  • checkIntel Stratix 10 GX 2800 FPGA with up to 10TFlops
  • checkFour 100G QSFP Ethernet Ports
  • check(4) banks of 8 GB DDR4 per FPGA
  • checkPCIe Gen3 x16 Host Interface
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520C - with Intel Stratix 10

  • checkIntel Stratix 10 GX 2800 FPGA with up to 10TFlops
  • check(4) banks of 8 GB DDR4 per FPGA
  • checkPCIe Gen3 x16 Host Interface
  • checkHighest density FPGA fabric
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385A - with Arria 10 FPGA

  • checkAltera Arria 10 1150 GX FPGA with up to 1.5 TFlops
  • checkNetwork Enabled with (2) QSFP 10/40 GbE Ports
  • check8 GB DDR3 on-card memory
  • checkPCIe Gen3 x8 Host Interface
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510T - with Arria 10 FPGA

  • checkDual Altera Arria 10 1150 GX FPGAs with up to 3 TFlops
  • check (4) banks of 4 GB DDR4 per FPGA
  • checkOptional Hybrid Memory Cube (HMC)
  • checkPCIe Gen3 x16 Host Interface
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385 - with Stratix V (A7 or D5)

  • checkNallatech's most popular OpenCL card
  • checkTypical application ≤ 25W
  • checkAltera Stratix V (A7 or D5) FPGA + 8GB DDR3
  • checkNetwork Enabled with (2) SFP+ 10GbE ports
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395 with Stratix V (AB or D8)

  • checkNetwork Enabled with (2) SFP+ 10GbE ports
  • checkTypical application ≤ 75W
  • checkLargest Altera FPGA: Stratix V (AB or D8)
  • checkHighest Density Memory: 32GB of DDR3
  • check(4) SFP+ network ports supporting 10GbE and multiple standards
  • checkClock/data recovery of SFP+ ports

Development environment

Altera SDK for OpenCL

To develop using OpenCL on Altera Stratix V accelerator board, you need "Altera SDK for OpenCL".

The Altera SDK for OpenCL converts OpenCL kernel functions to custom FPGA hardware accelerators, adds interface IPs, builds intermediate logic, and generates FPGA programming files. In addition, this SDK includes libraries that link to the OpenCL API which is called in the host program on the CPU. By automating such steps, designers will be able to focus on defining and executing algorithms over hardware design.

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