Press release October 19, 2017
Fixstars Corporation (Head Office: Shinagawa-ku, Tokyo, CEO: Satoshi Miki, hereinafter Fixstars) has launched a beta version of "Halide*3 to FPGA" （ URL：https://www.halide2fpga.com/ open_in_new） providing IP cores*2 for FPGA*1.
With the practical use of AI/IoT, demand for high-speed processing of large amounts of data and low delay has increased, and the development and use of dedicated circuits such as FPGA and deep learning chip are proceeding. However, learning the hardware description language used for such chip development is extremely difficult for software engineers. In addition, the time required for development has been prolonged, the increase in cost accompanying it and the prolongation of time to market*4 have been recognized as a major risk for management.
"Halide to FPGA" provides sample code written in a programming language designed specifically for computer vision* 5 called "Halide" and IP core for FPGA generated from this sample code. In addition, we can convert code posted on this website other than Halide code to IP core in a short period of time, and can respond swiftly and flexibly to various customizations in response to customer's needs.
"Halide to FPGA" uses the "Genesis™ compiler" made by using Fixstars' long-time parallel processing technology and hardware-specific optimization technology. The "Genesis™ compiler" will automatically replace Halide code to convert it to FPGA IP core. The replaced code achieves both processing speed and gate occupancy that are inevitable in the circuit developed in the hardware description language and greatly shortens the development period.
"Halide to FPGA" shows the way of FPGA development to software engineers who have been deprived of acquiring the hardware description language. In addition, by reducing the development period, we are reducing development costs and improving time to market. Compared to the case where we develop in the hardware description language, we show the same performance or better in processing speed and gate occupancy, but we were able to limit development period to less than 1/10.
On "Halide to FPGA", Halide code optimized for FPGA is released for various applications, and more will be added in the future. Halide code is released as open source and can be tried on CPU.
For inquiries such as customization, please contact us from here.
*1：An FPGA is an integrated circuit that can be configured by a purchaser or a designer after chip manufacturing. In addition to its customizability, it has come to be used in various applications from data center to edge device recently due to features such as low power consumption and low delay.
*2：The IP core is partial circuit information constituting an integrated circuit, and in many cases, it is often gathered in functional units. In order to improve the development efficiency of integrated circuits, movements have been made to combine the circuits in a form that can be reused in function block units and to use them in other products. The IP core vendor provides IP cores to integrated circuit developers, contracts are common for developers to pay royalties.
*3：Halide is a programming language which has strengths in image processing, etc., developed mainly by MIT. Although parallelization is performed for speeding up image processing, parallel processing programming is complicated and takes a lot of labor. Therefore, Halide separates the algorithm part of the image processing and the execution procedure part of the parallelization and prepares an environment where workers can devote themselves to algorithm development.
*4：time to market means the time until products are put into the market. In a fast-paced industry such as electronic equipment, competitiveness of the company depends on whether the company can quickly introduce new products tailored to market needs.
*5：Computer vision is a field aimed at implementing "eyes" and "brain" for computers for processing data from image sensors and signal sensors.